The present invention relates to an interlocking operating system between two power supply units in a power supply apparatus.
In a plug-in type power supply apparatus requiring different output voltages (e.g., five different voltages of +9 V, +5 V, -2.1 V, -5.2 V, and -9 V) having a large current capacity, since the number of plug-in connectors which can be mounted on one package is limited, an interlocking operating system constituted by a plurality of power supply units is required.
In a conventional interlocking operating system constituted by two power supply units, as shown in a block diagram of a conventional interlocking operating system of FIG. 2, a power supply unit 1 having a switch 3 in an input stage has a starting circuit 11 and an interlocking circuit 12, and a power supply unit 2 having no switch has a starting circuit 9 having the same arrangement as that of the starting circuit 17 and an interlocking circuit 10 having the same arrangement as that of the interlocking circuit 12. Reference numerals 4 and 6 denote DC/DC converters, and reference numerals 5 and 8 denote control circuits. When a voltage is applied to inputs IN1 and IN2 of a power supply system, the power supply unit 2 is set in a standby state by the starting circuit 9 and supplies a signal to the interlocking circuit 12 of the power supply unit 1 through the interlocking circuit 10. In this state, when the switch 3 of the power supply unit 1 is manually turned on, the power supply unit 1 is started and supplies a signal to the interlocking circuit 10 of the power supply unit 2 through the interlocking circuit 12 so as to release the standby state of the power supply unit 2, thereby starting the power supply unit 2.
FIG. 3 is a block diagram showing the conventional interlocking operating system of FIG. 2 in detail. In FIG. 3, reference numerals 104 and 120 denote power supply circuits; 105 and 121, input voltage monitor circuits; 107 and 123, interlocking signal transmission circuits; 108 and 124, interlocking signal reception circuits; 110 and 126, PWM (Pulse Width Modulation) circuits; 111 and 127, output voltage error amplification circuits; 113 and 129, input smoothing capacitors; 114 and 130, switching transistors; 115 and 131, voltage transformers; 116 and 132, rectification diodes; and 117 and 133, output smoothing capacitors.
In FIG. 3, in an ON state of the switch 3 of the first power supply unit 1, when a voltage is applied to the inputs IN1 and IN2 of the system and exceeds a threshold level of the monitor circuits 105 and 121, starting signals are supplied from the monitor circuits 105 and 121 to the interlocking signal transmission circuits 107 and 123.
The interlocking signal transmission circuits 107 and 123 which receive the starting signals send interlocking signals to the interlocking signal reception circuits 108 and 124 of the first and second power supply units, respectively.
The interlocking signal reception circuits 108 and 124 calculate logic AND products between the interlocking signals from the first and second power supply units to send the starting signals to the PWM circuits 110 and 126.
The PWM circuits 110 and 126 which receive the starting signals start their modulating operations to send drive signals to the gates of the switching transistor 114 and 130, thereby enabling the DC/DC converters 4 and 6. For this reason, the first and second power supply units 1 and 2 start their operations. That is, since each of the first and second power supply units 1 and 2 calculates the logic AND product between the interlocking signals, the first and second power supply units 1 and 2 start their operations to be interlocked to each other regardless of the closing operation of the switch 3 and an order of voltage application to the inputs IN1 and IN2.
Note that output voltage data of the first and second power supply units 1 and 2, i.e., the DC/DC converters 4 and 6, are received and amplified in the output voltage error amplification circuits 111 and 127 and subjected to pulse width modulation so as to drive the transistors 114 and 130, thereby stabilizing an output voltage.
As described above, in the conventional interlocking operating system, since independent starting circuits and interlocking circuits are arranged in each of the power supply units, the circuit arrangement is complicated. In addition, when these power supply unit are plug-in type power supply units using a connector, in the power supply unit having no switch, a charge/discharge current flows to the input smoothing capacitors 113 and 129 (generally having a capacitance of several hundreds .mu.F) of the input of the power supply unit when the plug is inserted or drawn, thereby causing an inrush current to flow. Therefore, welding of the pins of the connector may occur.